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Concept of the gated ring oscillator TDC. | Download Scientific Diagram
Figure 1 from An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages | Semantic Scholar
Gated Ring Oscillator Based TDC [3] | Download Scientific Diagram
Concept of the gated ring oscillator TDC. | Download Scientific Diagram
Sensors | Free Full-Text | A Cyclic Vernier Two-Step TDC for High Input Range Time-of-Flight Sensor Using Startup Time Correction Technique
Figure 8 from An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages | Semantic Scholar
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Figure 11 from A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping | Semantic Scholar
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An accurate time-to-digital converter based on a self-timed ring oscillator for on-the-fly time measurement | SpringerLink
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Electronics | Free Full-Text | Radiation Assessment of a 15.6ps Single-Shot Time-to-Digital Converter in Terms of TID
Principle of the GRO based TDC. | Download Scientific Diagram
A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
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a Ring oscillator-based TDC and b gated ring oscillator-based TDC | Download Scientific Diagram
Etd | A Tunable Conjoined-Ring Vernier (CRV) TDC with Sub-picosecond Time Resolution and the Correction of Parallel-Output-Misalignment Effects | ID: v692t723c | Hyrax
A High Resolution First Order Noise-Shaping Vernier Time-to-Digital Converter
Block diagram of (a) delay-line-based TDC, and (b)... | Download Scientific Diagram
Figure 2 from A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps | Semantic Scholar
Synthesizable 2D Vernier TDC based on gated ring oscillators Sestavljivi 2D Vernier TDC na osnovi obročnih oscilatorjev
Figure 3 from An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages | Semantic Scholar
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